TIS-SPE
Tactical Input Segment Screener Processor Element
SDL developed the hardware and software for the Screener Processor Element (SPE) portion of the Tactical Input Segment (TIS).
The TIS is a Common Imagery Ground/Surface Systems (CIGSS) compliant ground station designed to receive, process, and screen tactical imagery as a segment of the Joint Service Imagery Processing System-Navy (JSIPS-N). Data received from the legacy tactical sensors pass through the SPE and on to the Common Imagery Processor (CIP). The SPE receives processed imagery and support data from the CIP and screens this imagery. The SPE also processes and screens the Shared Reconnaissance Pod (SHARP) data received over a Common Data Link (CDL) or from the SHARP digital storage system cartridge.
In addition to the base effort of developing software and building seven SPE hardware units and 15 Advanced Reconnaissance Compression Hardware (ARCH) circuit board suites, SDL also:
- Upgraded the existing GFE CIP equipment and designed and implemented enhancements to CFE Sensor Data Simulator units.
- Designed and built a reduced-capability, PC-based implementation of the SPE, the SHARP Archive Station, as a test asset.
- Provided installation and fielding support for the TIS-SPE units deployed at test sites, planning centers, and aboard US Navy vessels.
- Provided software updates and support.
- Designed a CDL Interface Box (CIB)/RACEway-Ethernet Card (REC) system as a Reliability, Maintainability and Availability improvement for the TIS. SDL developed, tested and delivered 13 rack-mountable CIB/REC sets, which provided improved CDL simulation, diagnostic and interface capabilities, and replaced existing interface cards and simulators that were currently in use with fielded TIS systems.
The TIS-SPE has been deployed aboard 11 different amphibious assault ships and aircraft carriers.
